The contrast between Morgan's larger-than-life energy and Radcliffe's more buttoned-up straight man role is gold, amplifying the show's 30 Rock-style rhythm and sharp wit. As I wrote in my review, "While their Reggie Dinkins characters gel like rubber and glue at first, Morgan and Radcliffe are the comedy equivalent of peanut butter and jelly: perfectly complementary, and a joy to savor." — B.E.
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Cortex X925 has a 64 KB L1 data cache with 4 cycle latency like A725 companions in GB10, but takes advantage of its larger power and area budget to make that capacity go further. It uses a more sophisticated re-reference interval prediction (RRIP) replacement policy rather than the pseudo-LRU policy used on A725. Bandwidth is higher too. Arm’s technical reference manual says the L1D has “4x128-bit read paths and 4x128-bit write paths”. Sustaining more than two stores per cycle is impossible because the core only has two store-capable AGUs. Loads can use all four AGUs, and can achieve 64B/cycle from the L1 data cache. That’s competitive against many AVX2-capable x86-64 CPUs from a few generations ago. However, more recent Intel and AMD cores can use their wider vector width and faster clocks to achieve much higher L1D bandwidth, even if they also have four AGUs.
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Through IOKit probing, scaling analysis, and power measurement, we’ve built this profile of the M4 ANE: